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Physics · PYQ NEET UG 2023

हिन्दी

For the following logic circuit, the truth table is:

  1. A B Y 0 0 1 0 1 1 1 0 1 1 1 0
  2. A B Y 0 0 0 0 1 0 1 0 0 1 1 1
  3. A B Y 0 0 1 0 1 0 1 0 1 1 1 0
  4. A B Y 0 0 0 0 1 1 1 0 1 1 1 1

Correct answer · Option 1

A B Y 0 0 1 0 1 1 1 0 1 1 1 0

Explanation

Inputs A and B pass through NOT gates (inverters), giving \( \bar{A} \) and \( \bar{B} \). These are connected to a NAND gate, so \( Y = \overline{\bar{A} \cdot \bar{B}} = A + B \) (by De Morgan's Law, which is equivalent to an OR gate). Checking the truth table for OR gate: 0,0->0; 0,1->1; 1,0->1; 1,1->1.
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